Cen-Grand DSDAC 1.0 (Standard / Superclock model)

The DSDAC1.0 is a high-performance audio DAC based on DSD theory. It is completely different from ordinary DAC because it has many original technologies. It does not use conventional chips for DA conversion but FPGA and discrete components for digital processing. DSDAC1.0 can increase the frequency of all input data including PCM or dsd64 to dsd1024. If the input data is higher than the dsd128, you can also output it directly without increasing it. DSD frequency raising algorithm is a very complex mathematical process, DSDAC1.0 did a good job. One year after the standard model was launched, the super clock model was launched. Performance is further improved.

Price: Standard €2890 / Superclock €3820

Price includes VAT

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The Cen-Grand DSDAC1.0 is an audio DAC based on DSD audio technology.  It took five years to develop and realized the perfect playback of DSD audio.  It has three advanced audio technologies.

1: high-precision DSD frequency up algorithm,
2: synchronous direct clock,
3: clock blocking technology. 

It is a perfect DSD audio DAC. The DSDAC1.0 has three models: standard, super clock model and the deluxe model.

Difference between the Cen-Grand DSDAC 1.0 standard model and super clock model  

1: The clock system of super clock model has higher performance, RMS jitter is as low as 100fs
2: Some advanced components are used

R&D Background

DSD audio coding mode is almost perfect, although it has many technical barriers. The unique charm of DSD sound attracts many people, many music lovers have had high enthusiasm for DSD in the past decade. At present more than 10000 SACD music albums have been released in the world which is a valuable music resource for mankind. In order to make it play a greater role, many people are making unremitting efforts and they are one of them.

Due to the disc storage space being limited, SACD adopts the dsd64 format, which has a lower frequency. The accuracy of dsd64 in DA conversion is low and there is out-of-band noise (noise above 23khz) after the DA process. Therefore, most SACD players must convert dsd64 to PCM before DA conversion. This way weakens the advantages of DSD, and it was an important reason why SACD fails in the competition with CD.

With the passage of time, more in-depth research on DSD coding technology has made progress. FPGA technology has also made great progress. Therefore, the technology to raise the DSD frequency from 2.8224MHz to a high number has been available. It can make the DA process with higher accuracy after the frequency was raised. At the same time, because the frequency of out-of-band noise is pushed up, it can be easily filtered out. Based on these conditions, they decided to start the research and development of the algorithm for DSD frequency increasing.

R&D History

DSD technology is a commercial technology, so there is little public information can be found. After several years of effort, they studied the basic theory of DSD and created a unique algorithm to realize the high-precision frequency rising. At the same time, they made a comprehensive innovation in the clock framework, and created two unique technologies of “synchronous direct clock” and “clock blocking”. 

Analog circuit is the key part of DAC. The advantages of the digital part must rely on the analog circuit. One deviation of the analog part is enough to offset the three advantages of the digital part. The R & D team of DSDAC1.0 spent nearly a year for designing the circuit architecture of the analog part, more than 20 times. After a long period of adjustment, dsdac1.0 has reached the level of reference DAC.

Core Technology

The high-precision frequency rise algorithm is the core of DSDAC1.0. Although there are many ways to produce frequency rising, but the high-precision frequency rise algorithm is a complex mathematical problem, not a digital technical problem. The technology of frequency rising not only makes DSD more widely used but also makes DSDAC1.0 become the leading audio DAC.

Synchronous direct clock technology: femtosecond clock inside DSDAC1.0 will be sent to the shift register directly without any intermediate conversion so that the performance of the femtosecond clock is directly reflected in the analog output. This technology is different from the use of an external femtosecond clock and a built-in femtosecond crystal oscillator. The use of an external clock and built-in crystal oscillator can only be a source clock, it must be divided by a frequency divider.  In this way, there are large additive jitters, which change the femtosecond clock from femtosecond to picosecond. The clock of DSDAC1.0 can be sent to the shift register directly without a frequency divider, it is an advanced technology of clock application.

Clock blocking: It means that the clock from the pre-devices is abandoned and the DSDAC1.0 only uses the local clock. In this way, the clock of pre-devices such as digital turntable, CD player and digital interface will no longer affect the performance of DAC. As long as the data is correct, there is no difference in any digital source. This technology is a dream of digital audio.  Clock blocking is a synchronization process, not the ASRC, which has a great negative impact on sound quality. It solves the clock problem that has plagued the digital audio field for a long time.

DSDAC1.0 has an advanced USB interface and can receive DSD source code in native mode. As a DSD DAC, receiving DSD source code is a necessary function. DSDAC1.0 has two ways to input DSD source code: one is to input dsd64 via SPDIF in DOP mode, and the other is to input dsd512 via USB in native mode. The XU208 scheme of XMOS inside DSDAC1.0 has a ground isolation function, the interference of the front digital source can be almost isolated. They have customized the special driver from XMOS to enable DSDAC1.0 to receive the source code of dsd512 in native mode.

The deluxe model can also be used as a Pre-Amp. It can provide a maximum 5db gain for the input signal. In Pre-Amp mode the function of DAC would be terminated.

SPDIF sampling ratePCM 192 kHz / dop64 (AES, optical fiber, coaxial, BNC)
USB sampling ratepcm384 / dsd512 (native)
Output interfaceone for XLR and one for RCA
Output level5.0V RMS (XLR), 2.5V RMS (RCA)
Volume control range– 70dB ~ 0dB
Overall dimension430 * 360 * 100mm
Net weight10.6kg
Gross weight13.3kg

Cen-Grand DSDAC 1.0 (Standard / Superclock model)

Not Available